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서울대학교 이종호 교수님 연구실Semiconductor Materials and Devices Laboratory

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Home Charge-trap synaptic device with polycrystalline silicon channel for low power in-memory computing

Home Charge-trap synaptic device with polycrystalline silicon channel for low power in-memory computing

Charge-trap synaptic device with polycrystalline silicon channel for low power in-memory computing

저자

Min-Kyu Park et al.

저널 정보

Scientific Reports

출간연도

2024

링크

https://doi.org/10.1038/s41598-024-80272-x

Charge-trap synaptic device with polycrystalline silicon channel for low power in-memory computing