Home Elimination of the gate and drain bias stresses in I–V characteristics of WSe2 FETs by using dual channel pulse measurement
저자
Jun-Mo Park et al.
저널 정보
Applied Physics Letters
출간연도
2016
링크
https://doi.org/10.1063/1.4960459
Elimination of the gate and drain bias stresses in I–V characteristics of WSe2 FETs by using dual channel pulse measurement