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서울대학교 이종호 교수님 연구실Semiconductor Materials and Devices Laboratory

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Home Simulation study on deep nanoscale short channel junctionless SOI FinFETs with triple-gate or double-gate structures

Home Simulation study on deep nanoscale short channel junctionless SOI FinFETs with triple-gate or double-gate structures

Simulation study on deep nanoscale short channel junctionless SOI FinFETs with triple-gate or double-gate structures

저자

Xi Liu et al.

저널 정보

Journal of Computational Electronics

출간연도

2014

링크

https://doi.org/10.1007/s10825-014-0562-3

Simulation study on deep nanoscale short channel junctionless SOI FinFETs with triple-gate or double-gate structures