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서울대학교 이종호 교수님 연구실Semiconductor Materials and Devices Laboratory

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Home Voltage scheme for string-select transistors to improve inhibition characteristics during 1-bit erase in vertical NAND flash

Home Voltage scheme for string-select transistors to improve inhibition characteristics during 1-bit erase in vertical NAND flash

Voltage scheme for string-select transistors to improve inhibition characteristics during 1-bit erase in vertical NAND flash

저자

Sung-Ho Park et al.

저널 정보

Applied Physics Letters

출간연도

2023

링크

https://doi.org/10.1063/5.0161000

Voltage scheme for string-select transistors to improve inhibition characteristics during 1-bit erase in vertical NAND flash